PLFM_RADAR

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AERIS-10 FMCW X-Band Phased Array Radar — Engineering Documentation, Physics Derivations & Improvement Research

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- - ARCHITECTURE.md
  - CONCERNS.md
  - CONVENTIONS.md
  - INTEGRATIONS.md
  - STACK.md
  - STRUCTURE.md
  - TESTING.md
- - ARCHITECTURE.md
  - FEATURES.md
  - PITFALLS.md
  - STACK.md
  - SUMMARY.md
- config.json
- PROJECT.md
- REQUIREMENTS.md
- ROADMAP.md
- STATE.md
- conventions.md
- parameter_table.md
- symbol_table.md
- - beam_pattern_N16_taylor.svg
  - beam_pattern_N16_uniform.svg
  - detection_curves_swerling0.svg
  - detection_curves_swerling1.svg
  - gen_detection_curves.py
  - generate_beam_patterns.py
- 01_fmcw_theory.md
- 02_lfm_waveform_model.md
- 03_beamforming_theory.md
- 04_detection_theory.md
- 05_noise_analysis.md
- 06_calibration_theory.md
- 01_system_overview.md
- 02_rf_frontend.md
- 03_frequency_synthesis.md
- 04_antenna_beamforming.md
- 05_fpga_board.md
- 06_power_management.md
- 07_timing_budget.md
- 08_power_budget.md
- 09_gps_imu_transforms.md
- 01_fpga_pipeline.md
- 02_stm32_firmware.md
- 03_python_gui.md
- 04_usb_protocol.md
- 01_cfar_variants.md
- 02_clutter_rejection.md
- 03_range_extension.md
- 04_fpga_optimization.md
- 05_ml_detection.md
- 06_pulse_compression.md
- 07_target_tracking.md
- 08_adaptive_beamforming.md
- Project_Description.docx
- Functional_Diagram.dwg
- RADAR_V6.drawio
- RADAR_V6.jpg
- Power Management V6.xlsx
- - Stack_Hybrid.png
- - Stack_Hybrid.png
- - openems_quartz_slotted_wg_10p5GHz.py
  - Quartz_Waveguide.py
- - dac_output.csv
  - DAC_RLPF.dat
  - DAC_RLPF.dpl
  - DAC_RLPF.sch
  - Generate_ChirpcsvFile.py
  - multi_ramp_output.csv
  - multi_ramp_stairs.csv
  - ramp_output.csv
- - via_fence_setup_pitch.png
  - via_fence_setup_pitch_offset.png
  - Via_fencing.py
  - Via_fencing2.py
- - IF_BPF.dat
  - IF_BPF.dpl
  - IF_BPF.sch
- - IF_BPF_Balanced.dat
  - IF_BPF_Balanced.dpl
  - IF_BPF_Balanced.sch
  - multiband_signal.csv
  - six_tone_signal.csv
- - Impedance.dat
  - Impedance.dpl
  - Impedance.sch
- - Drawing1.bak
  - Drawing1.dxf
  - gerber_file.gbr
  - qucs2grb_log.txt
  - Sim_BPF_Te_100um.dat
  - Sim_BPF_Te_100um.dpl
  - Sim_BPF_Te_100um.gds
  - Sim_BPF_Te_100um.ite
  - Sim_BPF_Te_100um.net
  - Sim_BPF_Te_100um.pcb
  - Sim_BPF_Te_100um.pdf
  - Sim_BPF_Te_100um.sch
- - et
  - ht
  - port_it1A
  - port_it1B
  - port_ut1A
  - port_ut1B
  - port_ut1C
  - wg_alumina_32.xml
- - et
  - ht
  - port_it1A
  - port_it1B
  - port_ut1A
  - port_ut1B
  - port_ut1C
  - wg_alumina.xml
- - Stub_BPF.dat
  - Stub_BPF.net
  - Stub_BPF.sch
- array_pattern_heatmap.png
- array_pattern_Kaiser25dB_like.py
- E_plane_cut.png
- E_plane_Kaiser25dB_like.png
- H_plane_cut.png
- H_plane_Kaiser25dB_like.png
- Heatmap_Kaiser25dB_like.png
- QPA2962.dat
- QPA2962.dpl
- QPA2962.sch
- slot_layout_taper32.csv
- Slotted_DielectricFilled_Waveguide.m
- Stub_BPF_V5.dat
- Stub_BPF_V5.dpl
- Stub_BPF_V5.sch
- wg_alumina_slotted_openems.m
- UG-290.pdf
- - ad8352.pdf
  - AD9434_AD9484_Schematic.pdf
  - AD9484.pdf
  - RX_Chain_Gain_Noise_Summary_ABAC_Radar.docx
  - UG-290.pdf
- - ADF4382A.pdf
  - eval_adf4382a_ug_2185-3392420.pdf
- - QPA2962 Data Sheet.pdf
- 60124102122403.pdf
- AD9708.pdf
- ADAR1000.pdf
- ADM7151.pdf
- ads7830.pdf
- adtr1107.pdf
- AT93C46A.pdf
- attenuator_n_catalog_partition37_en.pdf
- dac7578.pdf
- DS_FT2232H.pdf
- DS_FT232RN.pdf
- EP4RKU_2b-1858448.pdf
- FR2-SMA-KFD0405A_2025-08-11.pdf
- hr2220p601r-10-datasheet.pdf
- ina241a.pdf
- lm2663.pdf
- LTC5552f.pdf
- LTC6419fa.pdf
- M3SWA2-34DR+.pdf
- MAX1449-3468915.pdf
- max20029-max20029d.pdf
- MMIQA-0218HPSM-Integrated Drive GaAs MMIC IQ Mixer.pdf
- MTX2-143+.pdf
- opa703.pdf
- PMA2-123LNW+.pdf
- PMA5_123_3W_2b-3577903.pdf
- QPA1013D Data Sheet.pdf
- QPM1021 Data Sheet.pdf
- RO4000 Laminates RO4003C and RO4350B - Data Sheet (1).pdf
- RO4000 Laminates RO4003C and RO4350B - Data Sheet.pdf
- SMIQ-5143H+.pdf
- STUW81300TR.pdf
- TGA2623_Data_Sheet-1518452.pdf
- tmp35_36_37.pdf
- tps562201.pdf
- tps7a8300.pdf
- - CSV_radar.py
  - CSV_radar_2.py
  - FFT_Ramp_Frequency.py
  - Gen_Triangular.py
  - Generic_Ramp_Frequency.py
  - Generic_Triangular_Frequency.py
  - LUT.py
  - patch_antenna.py
  - RADAR_eq.py
  - Ramp_Frequency.py
  - small_test_radar_data.csv
  - test_radar_data.csv
- 0044.jpg
- 3fb1dabf-2c6d-4b5d-b471-48bc461ce914.jpg
- Antenna_Array.jpg
- b79a6fe3-5abf-473d-b3e2-178e6a9cf4da - Copie.jpg
- GUI.jpg
- RADAR_V6.jpg
- SplitRing_test.mp4
- - ad9484_interface_400m.v
  - cdc_modules.v
  - chirp_lut_init.v
  - chirp_memory_loader_param.v
  - cic_decimator_4x_enhanced.v
  - cntrt.xdc
  - dac_interface_single.v
  - ddc_400m.v
  - ddc_input_interface.v
  - doppler_processor.v
  - edge_detector.v
  - fft_1024_forward.v
  - fft_1024_inverse.v
  - fir_lowpass.v
  - frequency_matched_filter.v
  - latency_buffer_2159.v
  - level_shifter_interface.v
  - long_chirp_seg0_i.mem
  - long_chirp_seg0_q.mem
  - long_chirp_seg1_i.mem
  - long_chirp_seg1_q.mem
  - long_chirp_seg2_i.mem
  - long_chirp_seg2_q.mem
  - lvds_to_cmos_400m.v
  - matched_filter_multi_segment.v
  - nco_400m_enhanced.v
  - plfm_chirp_controller.v
  - radar_receiver_final.v
  - radar_system_tb.v
  - radar_system_top.v
  - radar_transmitter.v
  - short_chirp_i.mem
  - short_chirp_q.mem
  - usb_data_interface.v
  - usb_packet_analyzer.v
- - GUI_V1.py
  - GUI_V2.py
  - GUI_V3.py
  - GUI_V4.py
  - GUI_V4_2_CSV.py
  - GUI_V5.py
  - GUI_V5_Demo.py
  - GUI_V6.gif
  - GUI_V6.py
  - GUI_V6_Demo.py
  - GUI_versions.txt
  - test_radar_data.csv
- 03_hw_improvements.md
README.md

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# AERIS-10: Open Source Pulse Linear Frequency Modulated Phased Array Radar

[![License: MIT](https://img.shields.io/badge/License-MIT-yellow.svg)](https://opensource.org/licenses/MIT)
[![Status: Alpha](https://img.shields.io/badge/Status-Alpha-orange)](https://github.com/NawfalMotii79/PLFM_RADAR)
[![Frequency: 10.5GHz](https://img.shields.io/badge/Frequency-10.5GHz-blue)](https://github.com/NawfalMotii79/PLFM_RADAR))
[![PRs Welcome](https://img.shields.io/badge/PRs-welcome-brightgreen.svg)](https://github.com/NawfalMotii79/PLFM_RADAR/pulls)

![AERIS-10 Radar System](https://raw.githubusercontent.com/mitgor/PLFM_RADAR/main/8_Utils/3fb1dabf-2c6d-4b5d-b471-48bc461ce914.jpg)

AERIS-10 is an open-source, low-cost 10.5 GHz phased array radar system featuring Pulse Linear Frequency Modulated (LFM) modulation. Available in two versions (3km and 20km range), it's designed for researchers, drone developers, and serious SDR enthusiasts who want to explore and experiment with phased array radar technology.

![AERIS-10 Radar System](https://raw.githubusercontent.com/mitgor/PLFM_RADAR/main/8_Utils/Antenna_Array.jpg)

## 📡 Overview

The AERIS-10 project aims to democratize radar technology by providing a fully open-source, modular, and hackable radar system. Whether you're a university researcher, a drone startup, or an advanced maker, AERIS-10 offers a platform for experimenting with beamforming, pulse compression, Doppler processing, and target tracking.

## 🔬 Key Features

- **Open Source Hardware & Software** - Complete schematics, PCB layouts, firmware, and software available
- **Dual Version Availability**:
  - **AERIS-10N (Nexus)**: 3km range with 8x16 patch antenna array
  - **AERIS-10X (Extended)**: 20km range with 32x16 dielectric-filled slotted waveguide array
- **Full Electronic Beam Steering** - ±45° electronic steering in elevation and azimuth
- **Advanced Signal Processing** - On-board FPGA handles pulse compression, Doppler FFT, MTI, and CFAR
- **Python GUI** - User-friendly interface with map integration
- **GPS/IMU Integration** - Real-time position and attitude correction
- **Modular Design** - Separate power management, frequency synthesis, and RF boards

## 🏗️ System Architecture

![AERIS-10 Radar System](https://raw.githubusercontent.com/mitgor/PLFM_RADAR/main/8_Utils/RADAR_V6.jpg)

### Hardware Components

The AERIS-10 main sub-systems are:

- **Power Management Board** - Supplies all necessary voltage levels to the electronics components with proper filtering and sequencing (sequencing ensured by the microcontroller)

- **Frequency Synthesizer Board** - Uses a high-performance Low Jitter Clock Generator (AD9523-1) that supplies phase-aligned clock references for:
  - RX and TX Frequency Synthesizers (ADF4382)
  - DAC
  - ADC
  - FPGA

- **Main Board** containing:
  - **DAC** - Generates the RADAR Chirps
  - **2x Microwave Mixers (LT5552)** - For up-conversion and IF-down-conversion
  - **4x 4-Channel Phase Shifters (ADAR1000)** - For RX and TX chain beamforming
  - **16x Front End Chips (ADTR1107)** - Used for both Low Noise Amplifying (RX) and Power Amplifying (TX) stages
  - **XC7A100T FPGA** - Handles RADAR Signal Processing:
    - PLFM Chirps generation via the DAC
    - Raw ADC data read
    - Automatic Gain Control (AGC)
    - I/Q Baseband Down-Conversion
    - Decimation
    - Filtering
    - Forward FFT
    - Pulse Compression
    - Doppler, MTI and CFAR processing
    - USB Interface
  - **STM32F746xx Microcontroller** - Used for:
    - Power-up and power-down sequencing (see Power Management Excel File)
    - FPGA communication
    - Setup and Interface with:
      - Clock Generator (AD9523-1)
      - 2x Frequency Synthesizers (ADF4382)
      - 4x 4-Channel Phase Shifters (ADAR1000) for RADAR pulse sequencing
      - 2x ADS7830 ADCs (on Power Amplifier Boards) for Idq measurement
      - 2x DAC5578 (on Power Amplifier Boards) for Vg control
      - GPS module for GUI map centering
      - GY-85 IMU for pitch/roll correction of target coordinates
      - BMP180 Barometer
      - Stepper Motor
      - 8x ADS7830 Temperature Sensors for cooling fan control
      - RF switches

- **16x Power Amplifier Boards** - Used only for AERIS-10E version, featuring 10Watt QPA2962 GaN amplifier for extended range

- **Antenna Arrays**:
  - **AERIS-10N (Nexus)** - 8x16 patch antenna array
  - **AERIS-10X (Extended)** - 32x16 dielectric-filled slotted waveguide antenna array

- **Miscellaneous Components**:
  - Slip-Ring
  - Stepper Motor and drivers
  - Cooling Fans
  - Enclosure)

### Processing Pipeline

1. **Waveform Generation** - DAC creates LFM chirps
2. **Up/Down Conversion** - LT5552 mixers handle frequency translation
3. **Beam Steering** - ADAR1000 phase shifters control 16 elements
4. **Signal Processing (FPGA)**:
   - Raw ADC data capture
   - I/Q baseband down-conversion
   - Decimation & filtering (CIC/FIR)
   - Pulse compression
   - Doppler FFT processing
   - MTI & CFAR detection
5. **System Management (STM32)**:
   - Power sequencing
   - Peripheral configuration
   - GPS/IMU integration
   - Stepper motor control
6. **Visualization (Python GUI)**:
   - Real-time target plotting
   - Map integration
   - Radar control interface

![AERIS-10 Radar System](https://raw.githubusercontent.com/mitgor/PLFM_RADAR/main/9_Firmware/9_3_GUI/GUI_V6.gif)

## 📊 Technical Specifications

| Parameter | AERIS-10N (Nexus) | AERIS-10X (Extended) |
|-----------|-------------------|----------------------|
| **Frequency** | 10.5 GHz | 10.5 GHz |
| **Max Range** | 3 km | 20 km |
| **Antenna** | 8x16 Patch Array | 32x16 Slotted Waveguide |
| **Beam Steering** | Electronic (±45°) | Electronic (±45°) |
| **Mechanical Scan** | 360° (stepper motor) | 360° (stepper motor) |
| **Output Power** | ~1Wx16 | 10Wx16 (GaN amplifier) |
| **Processing** | FPGA + STM32 | FPGA + STM32 |

## 🚀 Getting Started

### Prerequisites

- Basic understanding of radar principles
- Experience with PCB assembly (for hardware build)
- Python 3.8+ for the GUI software
- FPGA development tools (Vivado) for signal processing modifications

### Hardware Assembly

1. **Order PCBs**: All Gerber files are available in `/4_Schematics and Boards Layout`
2. **Source Components**: Bill of materials (BOM) in `/4_Schematics and Boards Layout/4_7_Production Files`
3. **Assembly**: Follow the assembly guide in `/10_docs/assembly_guide.md`
4. **Antenna**: Choose appropriate array for your version
5. **Enclosure**: 3D printable files in `/10_docs/Hardware/Enclosure`

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