AIonFPGA

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AI High-Performance Solution on FPGA

AIonFPGA 최신버젼 다운로드

최종 버전 다운로드 (.zip)

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# AIonFPGA

> AI High-Performance Solution on FPGA

## Abstract

In a world of self-driving cars and automated quality control in manufacturing, real-time image classification is becoming increasingly important.
Artificial intelligence, and deep learning in particular, are achieving excellent classification accuracies, but there are some challenges.

For one thing, high-resolution image acquisition systems require a lot of processing power.
For another, a large labeled dataset of training data is required to train deep convolutional neural networks.

A solution for the former is to use field-programmable gate arrays (FPGAs) as hardware accelerators.
Therefore, an embedded system featuring a multiprocessor system-on-chip with an integrated FPGA is deployed.
The second problem is approached with data augmentation to artificially increase the size of the labeled dataset.

This allowed the deployed convolutional neural network to achieve a Top-1 accuracy of 97.2&nbsp;% and a Top-5 accuracy of 99.5&nbsp;%.
In addition, the throughput of the image classification chain reached 41.1&nbsp;fps for color images of 1280×1024&nbsp;px.

Using data augmentation significantly improved the real-world classification performance by reducing the impact of ambient light.
Furthermore, it completely eliminated the need to collect additional data samples.

## Repository Structure

This repository is structured as follows:

```
.
├── doc                 # Documentation
│   ├── fact-sheet
│   ├── poster
│   ├── presentation
│   ├── project-plan
│   └── thesis          # Bachelor Thesis
│
├── mpsoc               # OS / DPU / Model
│   ├── build-pynq
│   ├── cnn-model       # Quantization
│   ├── dpu
│   └── pynq-setup
│
└── sw                  # Software
    ├── inference
    │   ├── aionfpga    # Inference Application
    │   └── camera      # Camera Library
    ├── packages
    │   └── fhnwtoys    # Package fhnwtoys
    ├── training        # Model
    └── verification
```

## Downloads

### Documents

The compiled `.pdf` files can be downloaded from here directly:

#### Compilation

The `.pdf` files can be built by running `make` in the respective directory:

```bash
$ make build clean
```

### Software

## Previous Project

This bachelor thesis is the continuation of the following previous project: [P5-AIonFPGA](https://git.io/p5-aionfpga)

## License

This project is licensed under the terms of the Apache License 2.0 - see the [LICENSE](LICENSE "LICENSE") file for details

[Project Plan]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v0.0.2/project-plan_aionfpga_canzani_mueller_v002.pdf
[Bachelor Thesis]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/p6_aionfpga_thesis_canzani_mueller.pdf
[Presentation]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/p6_aionfpga_presentation_canzani_mueller.pdf
[Fact Sheet]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/p6_aionfpga_fact-sheet_canzani_mueller.pdf
[Poster]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/p6_aionfpga_poster_canzani_mueller.pdf

[Camera Library]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/libcamera.so
[Saved Model]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/SavedModel.zip
[Frozen Graph]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/frozen_graph.pb
[Quantized Model]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/dpu_fhnw_toys_0.elf
[DPU bit]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/dpu.bit
[DPU hwh]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/dpu.hwh
[DPU xclbin]: https://github.com/MuellerDominik/AIonFPGA/releases/download/v1.0.0/dpu.xclbin

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