open-register-design-tool
Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
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Download Latest Version (.zip)- ci.yaml
- launch.json
- settings.json
- tasks.json
- gradle-wrapper.jar
- gradle-wrapper.properties
- libs.versions.toml
- issue_16.rdl
- issue_18.rdl
- issue_20_21.rdl
- issue_94_replicated_externals.rdl
- AnnotateCommand.java
- AnnotateNullCommand.java
- AnnotateSetCommand.java
- AnnotateShowCommand.java
- ModAddressableInstance.java
- ModBaseComponent.java
- ModComponent.java
- ModEnum.java
- ModEnumElement.java
- ModField.java
- ModFieldSet.java
- ModIndexedInstance.java
- ModInstance.java
- ModRegister.java
- ModRegSet.java
- ModRootComponent.java
- ModSignal.java
- DebugController.java
- DefinedProperties.java
- DefinedProperty.java
- JSpecModelExtractor.java
- MyDebugController.example
- Ordt.java
- OverlayFileInfo.java
- PropertyList.java
- RdlModelExtractor.java
- RegModelIntf.java
- RegNumber.java
- CHeaderBuilder.java
- MsgUtils.java
- OutputLine.java
- OutputWriterIntf.java
- SimpleOutputWriter.java
- CppModBuilder.java
- CppModClass.java
- CppBaseModClass.java
- CppDrvModBuilder.java
- PyBaseModClass.java
- PyDrvModBuilder.java
- DrvModBaseInstance.java
- DrvModBuilder.java
- DrvModRegInstance.java
- DrvModRegSetInstance.java
- JsonBuilder.java
- JspecBuilder.java
- RdlBuilder.java
- RegListBuilder.java
- XmlBuilder.java
- SystemVerilogIO2DSignal.java
- SystemVerilogIOElement.java
- SystemVerilogIOInterface.java
- SystemVerilogIOSignal.java
- SystemVerilogIOSignalList.java
- SystemVerilogIOSignalSet.java
- SystemVerilogIOStruct.java
- SystemVerilogWrapModule.java
- WrapperRemapInvertXform.java
- WrapperRemapSyncStagesXform.java
- WrapperRemapXform.java
- RemapRuleList.java
- SystemVerilogCoverGroups.java
- SystemVerilogDefinedSignal.java
- SystemVerilogDefinedSignalMap.java
- SystemVerilogDefSignalTypeIntf.java
- SystemVerilogFunction.java
- SystemVerilogInstance.java
- SystemVerilogLocationMap.java
- SystemVerilogModule.java
- SystemVerilogModuleReader.java
- SystemVerilogParameterizedRange.java
- SystemVerilogRange.java
- SystemVerilogRegisters.java
- SystemVerilogResolvedRange.java
- SystemVerilogSignal.java
- SystemVerilogSignalList.java
- SystemVerilogTask.java
- SystemVerilogDecodeModule.java
- SystemVerilogPioIfModule.java
- SystemVerilogSpiPioIfModule.java
- SystemVerilogBuilder.java
- SystemVerilogChildInfoBuilder.java
- SystemVerilogDefinedOrdtSignals.java
- SystemVerilogLogicModule.java
- SystemVerilogTestBuilder.java
- UVMRdlClasses.java
- UVMRdlLite1Classes.java
- UVMRegsBuilder.java
- UVMRegsCommon.java
- UVMRegsLite1Builder.java
- UVMRegsNativeBuilder.java
- VerilogBuilder.java
- VerilogTestBuilder.java
- AddressableInstanceProperties.java
- FieldProperties.java
- FieldSetProperties.java
- InstanceProperties.java
- JspecCategory.java
- JspecSubCategory.java
- OutputBuilder.java
- RegProperties.java
- RegSetProperties.java
- RhsExpression.java
- RhsReference.java
- SignalProperties.java
- UniqueNameSet.java
- ExtBooleanParameter.java
- ExtIntegerParameter.java
- ExtParameter.java
- ExtParameters.java
- ExtRegNumberParameter.java
- ExtStringListParameter.java
- ExtStringMapParameter.java
- ExtStringParameter.java
- Utils.java
- antlr_init
- CommonExtParms.g4
- ExtParms.g4
- JSpec.g4
- SimpleSV.g4
- SystemRDL.g4
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.py
- output.rdl
- output.reglist
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.js
- test.parms
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- bits.h
- hello_world.c
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- output.h
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- test.parms
- test.rdl
- ordt_pio.cpp
- ordt_pio.hpp
- ordt_pio_common.cpp
- ordt_pio_common.hpp
- ordt_pio_drv.cpp
- ordt_pio_drv.hpp
- output.h
- output.js
- output.py
- output.reglist
- output.sv
- output.v
- output.xml
- uvm_reg_jrdl_pkg.sv
- uvmregs.sv
- special_checks
- test.parms
- test.rdl
- gitrm_output
- makeallgold
- makegold
- runall
- runtest
- test.setup.example
- .gitattributes
- .gitignore
- build.gradle
- example.parms
- gradlew
- gradlew.bat
- LICENSE
- README.md
- settings.gradle
# Installation Guide
1. Get the code
git clone https://github.com/Juniper/open-register-design-tool
Downloads the entire project code from GitHub to your computer.
cd open-register-design-tool
Moves into the project folder you just downloaded.
2. Gradle (Java/Kotlin)
Medium RecommendedPrerequisites
- Git Needed to download the project code from GitHub.
- JDK (Java) Required to build and run Java/Kotlin projects.
- Gradle If the repo includes gradlew (Gradle Wrapper), you don't need to install Gradle separately.
./gradlew build
Builds the project using Gradle.
A BUILD SUCCESSFUL message means it worked. The output is created under build/.
// repository documentation
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