NoCRouter
RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni
File Explorer
Download Latest Version (.zip)- internal_interfaces.png
- router-router_interface.png
- Project Documentation.pdf
- vc_allocator2speculative_switch_allocator.sv
- non_speculative_switch_allocator.sv
- vc_allocator.sv
- non_spec_allocator.sv
- spec_allocator.sv
- speculative_switch_allocator.sv
- vc_allocator_for_spec.sv
- separable_input_first_allocator.sv
- router.sv
- tb_separable_input_first_allocator.sv
- tb_vc_allocator.sv
- input_block2crossbar.sv
- input_block2switch_allocator.sv
- input_block2vc_allocator.sv
- router2router.sv
- switch_allocator2crossbar.sv
- round_robin_arbiter.sv
- separable_input_first_allocator.sv
- switch_allocator.sv
- vc_allocator.sv
- crossbar.sv
- circular_buffer.sv
- input_block.sv
- input_buffer.sv
- input_port.sv
- rc_unit.sv
- mesh.sv
- noc.sv
- node_link.sv
- router_link.sv
- router.sv
- tb_round_robin_arbiter.sv
- tb_separable_input_first_allocator.sv
- tb_switch_allocator.sv
- tb_vc_allocator.sv
- tb_crossbar.sv
- tb_circular_buffer.sv
- tb_input_buffer.sv
- tb_input_port.sv
- tb_rc_unit.sv
- tb_mesh.sv
- tb_two_routers.sv
- tb_all_modules.sv
- tb_router.sv
- .gitignore
- _config.yml
- LICENSE
- README.md
// repository documentation
Was this content helpful?
(0 ratings)